Glossary & Abbreviations
ADC
Analog-to-Digital Converter
AOI
Automated Optical Inspection
ASIC
Application Specific Integrated Circuit
AXI
Automated X-Ray Inspection
BGA
Ball Grid Array
Boundary Scan
A method allowing you to observe and have complete control of the boundary pins of a JTAG compatible device via software control.
BSDL
Boundary Scan Description Language
BSR
Boundary Scan Register
CAD
Computer Aided Design
CEM
Contract Electronic Manufacturer
COB
Chip on Board
CPLD
Complex Programmable Logic Device
DFT
Design for Test(ability)
DIL
Dual In Line
DLL
Dynamic Link Library
DRAM
Dynamic Random Access Memory
DSP
Digital Signal Processor
DUT
Device Under Test
EDIF
Electronic Device Interchange Format
FBT
Functional Board Test
FIFO
First In - First Out
FPGA
Field Programmable Gate Array
FPT
Flying Probe Tester
HSDL
Hierarchical Scan Description Language (complements BSDL)
IC
Integrated Circuit
ICT
In-Circuit Test(ing)
IEEE 1149.1
IEEE (Institute of Electrical and Electronics Engineers) Standard 1149.1-1990 "Test Access Port and Boundary Scan Architecture" (see www.ieee.org)
I/O
Input / Output
IP
Intellectual Property
ISP
In-System Programming (the technique of programming devices after they have been soldered into the circuit board)
JEDEC
Joint Electron Device Engineering Council
JTAG
Joint Test Action Group (usually refers to IEEE 1149.1
standard compliance)
MCM
Multi Chip Module
NTRST
Test Reset (Active low TAP Signal)
OE
Output Enable
PCB
Printed Circuit Board
PLD
Programmable Logic Devices
PLL
Phase Locked Loop
QFP
Quad Flat Pack
RAM
Random Access Memory
SDRAM
Synchronous Dynamic Random Access Memory
SMT
Surface Mount Technology
SRAM
Static Random Access Memory
SSRAM
Synchronous Static Random Access Memory
STAPL
Standard Test and Programming Language (JAM)
SVF
Serial Vector Format
TAP
Test Access Port (the 4- or 5-wire interface to a boundary scan device)
TCK
Test Clock (TAP Signal)
TDI
Test Data Input (TAP signal)
TDO
Test Data Output (TAP Signal)
TMS
Test Mode Select (TAP Signal)
TRST
Test Reset (Active low TAP Signal)
UUT
Unit Under Test (can refer to components, boards, modules or
systems)
VLSI
Very Large Scale Integration
XJTAG
A suite of tools aiding the development and test of electronic systems
XJTAG Ltd. © Copyright 2008. All rights reserved. Part of 